处理器计算能力亟待突破两大瓶颈

随着摩尔定律走向终结、计算设备日渐移动化，技术人员正试图转向并行计算架构，以提升低功耗多核架构。

串行终结，并行开道

业界越来越担心今天的微处理器计算引擎已经来到了功率瓶颈（Power Wall）。这种认识引发了对高性能处理器路线图的重新评估。美国国家研究委员会关于未来计算性能的一份最新研究也已出炉。报告的副标题代表了它试图回答的根本问题——游戏结束还是下一关？

“串行计算的时代必须给并行计算的新时代让路了。”报告中断言道，“下一代的探索很可能需要在硬件和软件层面齐头并进。”

该报告的编写者，ADI公司CTO Samuel Fuller补充说，挑战在于不论“我们能不能开发出软件环境来开发为多核架构而生的新应用程序”，我们都需要新的并行编程环境。“必须在软件环境下达成突破”，Fuller说。

报告指出，随着单处理器和CMOS技术的发展走向终结，芯片设计师和软件开发者都必须将重心转向并行计算。

在这方面，报告为政府、企业、大学注资的研究给出了具体的方向性建议：

能够利用并行处理能力的新算法；

以更宽广的产业应用为目标开发新的编程方法；革新传统的计算“桟”以应对并行运算和资源管理方面的挑战；

投资新的，被移动处理器等新兴应用所驱动的并行架构；

投资在整个系统层面关注能效比的研发项目。此外，报告还建议研发应该“改善逻辑门能效比”、寻求CMOS以外的低功耗设备技术，以此来延缓瓶颈的到来。

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在软件方面，有些专家认为，开源趋势可以引领支持并行处理器的新编程方法的探索。根据David Lidde的看法，开源项目的运作越来越像成功的电子产业财团。Lidde是计算机行业的资深专家，目前是美国Venture Partners的合伙人。Liddle说，开源趋势对计算已经对计算造成了“巨大冲击”，现在需要通过新办法来“创造足以解决软件问题的推动力。”

最大的瓶颈：功耗

有些人坚持说手机片上系统等设备的性能提升被功耗严重限制。斯坦福大学电子工程系系主任Mark Horowitz说“我们陷入了困境。现在提升性能就意味着耗费电力。”

本周聚集此地的专家们就计算方面的研究建议达成了共识：芯片设计师和软件开发者现在需要进行更紧密的合作，因为他们需要探索一个适合高性能计算的新模式。说到底，问题还在于功耗。

P. A. Semi CEO、联合创世人Dan Dobberpuhl说：“我们需要降低电压，否则并行策略最终无法取得成功。”

点击参考原文：Report: Computing has hit 'power wall'

《电子工程专辑》网站版权所有，谢绝转载

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Report: Computing has hit 'power wall'

George Leopold

As Moore’s Law runs out of steam and computing goes mobile, technologists are searching for ways to make the leap to new parallel programming frameworks that can leverage low-power multicore architectures.

The moved has been spurred by growing industry concern that today’s microprocessor computing engines have hit a “power wall”. That in turn has prompted a re-evaluation of the roadmap for high-performance computing, a reassessment that yielded a new study published by the National Research Council on the future of computing performance. The report’s bottom line is summed up in its subtitle: “Game Over or Next Level?”

“The era of sequential computing must give way to a new era in which parallelism is at the forefront,” the report asserts. “The next generation of discoveries is likely to require advances at both the hardware and software levels….”

The challenge, added the report’s editor, Samuel Fuller, chief technology officer at Analog Devices, is whether “we can develop software environments to develop new applications for multicore architectures.” What is needed are new parallel programming environments, Fuller said. “The breakthrough needs to be in the software environment.”

As single processors and CMOS technology approach the end of the technology line, the computing report concludes that chip designers and software developers alike must shift their focus to parallelism.

To that end, the report specifically recommends that research funded by industry, government and universities along with partnerships among them should focus on:

New algorithms that can exploit parallel processing;

Developing new programming methods with an eye toward broader industry use;

Overhauling the traditional computing “stack” to account for parallelism and resource-management challenges;

Investing in new parallel architectures that are driven by emerging applications like mobile computing;

Investing in R&D that focuses on power efficiency at all system levels. Further, the report recommends that R&D should directly address the looming “power wall” issue by “making logic gates more power efficient” and by looking beyond CMOS to lower-power device technologies.

As for software, some experts argue that the Open Source movement could help lead the charge in developing new programming methods for leveraging parallel processors. Open Source projects tend to operate like successful electronics industry consortia, according to David Liddle, a computer industry veteran who now serves as a general partner with U.S. Venture Partners. The Open Source movement has had a “huge impact” on computing, Liddle said, and a new effort is needed “to create the momentum necessary to attack the software” problem.

Others insist that performance improvements in devices like mobile phone SoCs have been hampered by power limits. “We’re in this box,” said Mark Horowitz, chairman of the electrical engineering department at Stanford University and chief scientist at Rambus Inc. “Performance now comes with a power penalty.”

The consensus among experts gathered here this week to consider the computing study recommendations, is that chip designers and software developers are now bound more tightly together as they seek a new paradigm for high-performance computing. Ultimately, it all comes down to power.

“You need to keep reducing voltage [or] this parallelism strategy won’t work,” warned Dan Dobberpuhl, cofounder and CEO of P.A. Semi.