GW5AT-LV60UG225 is a high-speed integrated SERDES FPGA chip of Gowin's Arora V series. It adopts 22nm SRAM technology and has abundant internal resources, high-speed LVDS interface and rich BSRAM memory resources, at the same time integrated with self-developed DDR3, integrated 4-way 12.5 Gbps SERDES, support for PCIe 2.0 Hard Core, support for high-speed MIPI Hard Core, support for EDP, DP, SLVS-EC, SDI, USB 3.0 and many other protocols.
It is mainly used in many fields such as multi-screen display, CMS system, laser radar, automatic driving/assistant driving, vehicle power control, domain control and so on.

--Ultra-efficient low power
advanced 22nm lp process
low core voltage – 1.0v & 0.9v
dynamic clock gating

--Hardcore PCIe 3.0
supports x1, x2, x4, x8 lanes
including Root Complex and End Point dual-mode

--Hardcore MIPI D-PHY
MIPI transmission rate can reach 2.5 Gbps (RX/TX)
MIPI bandwidth 10Gbps with up to 4 data-lanes and 1 clock-lane

--Hardcore MIPI C-PHY
MIPI transmission rate can reach 2.5 Gbps (RX/TX) with up to 3 data-lanes

-- Integrates two ADC: SARADC and ADC Sensor
-- supports multiple SDRAM interfaces up to ddr3 1333Mbps
--supports multiple I/O level standards