前面我们介绍了ES8388的各项功能，重点是ADC和DAC的链路。之前也实现了寄存器的读写，现在就来对各功能进行封装方便调用.
Es8388.c如下
/******************************************************************************** 全局控制部分******************************************************************************/int es8388_set_mode_bck(es8388_mode_e mode, int mclkdiv2, int bclk_inv, int bclk_div){uint8_t regval = 0;regval |= (uint8_t)((uint8_t)mode<<7);regval |= (uint8_t)((uint8_t)mclkdiv2<<6);regval |= (uint8_t)((uint8_t)bclk_inv<<5);regval |= (uint8_t)((uint8_t)bclk_div<<0);if(0 == es8388_write_reg(ES8388_REG_8, regval)){return 0;}else{return -1;}}int es8388_set_chip_pwr_bits(int bits){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_2, ®val)){regval |= (uint8_t)bits;if(0 == es8388_write_reg(ES8388_REG_2, regval)){return 0;}else{return -2;}}else{return -1;}}int es8388_clr_chip_pwr_bits(int bits){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_2, ®val)){regval &= ~((uint8_t)bits);if(0 == es8388_write_reg(ES8388_REG_2, regval)){return 0;}else{return -2;}}else{return -1;}}int es8388_set_lrck(es8388_slrck_e slrck, es8388_lrcksel_e lrcksel){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_43, ®val)){regval &= (uint8_t)0x7F;regval |= (uint8_t)((uint8_t)slrck<<7);regval &= (uint8_t)0xBF;regval |= (uint8_t)((uint8_t)lrcksel<<6);if(0 == es8388_write_reg(ES8388_REG_43, regval)){return 0;}else{return -2;}}else{return -1;}}int es8388_set_vmidsel(es8388_vmidsel_e vmidsel){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_0, ®val)){regval &= (uint8_t)0xFC;regval |= (uint8_t)vmidsel;if(0 == es8388_write_reg(ES8388_REG_0, regval)){return 0;}else{return -2;}}else{return -1;}}int es8388_set_enref(int en){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_0, ®val)){if(en == 0){regval &= ~0x04;}else{regval |= 0x04;}if(0 == es8388_write_reg(ES8388_REG_0, regval)){return 0;}else{return -2;}}else{return -1;}}int es8388_set_chip_ctrl2_bits(int bits){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_1, ®val)){regval |= (uint8_t)bits;if(0 == es8388_write_reg(ES8388_REG_1, regval)){return 0;}else{return -2;}}else{return -1;}}int es8388_clr_chip_ctrl2_bits(int bits){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_1, ®val)){regval &= ~((uint8_t)bits);if(0 == es8388_write_reg(ES8388_REG_1, regval)){return 0;}else{return -2;}}else{return -1;}}int es8388_set_adc_pwr_bits(int bits){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_3, ®val)){regval |= (uint8_t)bits;if(0 == es8388_write_reg(ES8388_REG_3, regval)){return 0;}else{return -2;}}else{return -1;}}int es8388_clr_adc_pwr_bits(int bits){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_3, ®val)){regval &= ~((uint8_t)bits);if(0 == es8388_write_reg(ES8388_REG_3, regval)){return 0;}else{return -2;}}else{return -1;}}int es8388_set_dac_pwr(es8388_ch_e ch, int en){uint8_t regval;if(0 != es8388_read_reg(ES8388_REG_4,®val)){return -1;}if(ch == ES8388_CH_L){if(en == 0){regval |= 0x80;}else{regval &= ~0x80;}}else{if(en == 0){regval |= 0x40;}else{regval &= ~0x40;}}if(0 != es8388_write_reg(ES8388_REG_4,regval)){return -2;}return 0;}int es8388_set_dac_out_en(es8388_out_e ch, int en){uint8_t regval;uint8_t msk;switch(ch){case ES8388_OUT_L1:msk = 0x20;break;case ES8388_OUT_R1:msk = 0x10;break;case ES8388_OUT_L2:msk = 0x08;break;case ES8388_OUT_R2:msk = 0x04;break;default:return -3;break;}if(0 != es8388_read_reg(ES8388_REG_4,®val)){return -1;}if(en != 0){regval |= msk;}else{regval &= ~msk;}if(0 != es8388_write_reg(ES8388_REG_4,regval)){return -2;}return 0;}/******************************************************************************** ADC部分******************************************************************************/int es8388_set_adc_monomix(es8388_monomixsel_e sel){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_11, ®val)){regval &= ~MONOMIX_MSK;regval |= sel<if(0 == es8388_write_reg(ES8388_REG_11, regval)){return 0;}else{return -2;}}else{return -1;}}int es8388_set_adc_gain(es8388_ch_e ch, uint8_t gain){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_9, ®val)){if(gain > 24){gain = 24;}gain /= 3;if(ch == ES8388_CH_L){regval &= ~MICAMPL_MSK;regval |= gain<}else{regval &= ~MICAMPR_MSK;regval |= gain<}if(0 == es8388_write_reg(ES8388_REG_9, regval)){return 0;}else{return -2;}}else{return -1;}}int es8388_set_adc_ds(es8388_dssel_e lsel, es8388_dssel_e rsel){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_10, ®val)){regval |= DSSEL_MSK;if(rsel == ES8388_DSSEL_LIN1_RIN1){regval &= ~DSR_MSK;}else{regval |= DSR_MSK;}if(0 == es8388_write_reg(ES8388_REG_10, regval)){if(0 == es8388_read_reg(ES8388_REG_11, ®val)){if(lsel == ES8388_DSSEL_LIN1_RIN1){regval &= ~DS_MSK;}else{regval |= DS_MSK;}if(0 == es8388_write_reg(ES8388_REG_11, regval)){return 0;}else{return -2;}}else{return -1;}}else{return -2;}}else{return -1;}}int es8388_set_adc_in(es8388_ch_e ch, es8388_insel_e sel){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_10, ®val)){if(ch == ES8388_CH_L){regval &= ~LINSEL_MSK;regval |= (sel<}else{regval &= ~RINSEL_MSK;regval |= (sel<}if(0 == es8388_write_reg(ES8388_REG_10, regval)){return 0;}else{return -2;}}else{return -1;}}int es8388_set_adc_format(es8388_format_datsel_e datsel, es8388_format_lrp_e lrp,es8388_format_wl_e wl, es8388_format_e format){uint8_t regval = 0;regval |= datsel<<6;regval |= lrp<<5;regval |= wl<<2;regval |= format<<0;if(0 == es8388_write_reg(ES8388_REG_12, regval)){return 0;}else{return -2;}}int es8388_set_dac_format(int lrswap, es8388_format_lrp_e lrp,es8388_format_wl_e wl, es8388_format_e format){uint8_t regval = 0;regval |= lrswap<<7;regval |= lrp<<6;regval |= wl<<3;regval |= format<<1;if(0 == es8388_write_reg(ES8388_REG_23, regval)){return 0;}else{return -1;}}int es8388_set_adc_fs(es8388_fs_mode_e mode, es8388_fs_radio_e radio){uint8_t regval = 0;regval |= mode<<5;regval |= radio<<0;if(0 == es8388_write_reg(ES8388_REG_13, regval)){return 0;}else{return -2;}}int es8388_set_adc_vol_attenuates(es8388_ch_e ch, uint8_t db){if(db > 0xC0){db = 0xC0;}if(ch == ES8388_CH_L){if(0 == es8388_write_reg(ES8388_REG_16, db)){return 0;}else{return -2;}}else{if(0 == es8388_write_reg(ES8388_REG_17, db)){return 0;}else{return -2;}}}int es8388_set_adc_noisegate(int en, es8388_noise_gate_type_e type, int th){uint8_t regval = 0;regval |= type<<1;regval |= en<<0;/* 00000对应15311111对应60寄存器值1对应输入值的3*/if(th < 60){th = 60;}if(th > 153){th = 153;}//th = 31-(th-60)/3;th = 51-(th*2+3)/6;regval |= th<<2;if(0 == es8388_write_reg(ES8388_REG_22, regval)){return 0;}else{return -2;}}int es8388_set_adc_pgagain_th(int max, int min){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_18, ®val)){/* 000对应-6.5 -13111对应35.5 71*/if(max < -13){max = -13;}if(max > 71){max = 71;}//max = (max-(-13)))/12;max = (max*2+13*2+12)/24;/* 000对应-6 -24111对应30 60*/if(min < -24){min = -24;}if(min > 60){min = 60;}//min = (min-(-24)))/12;min = (min*2+24*2+12)/24;regval &= 0xC0;regval |= max<<3;regval |= min<<0;if(0 == es8388_write_reg(ES8388_REG_18, regval)){return 0;}else{return -2;}}else{return -1;}}int es8388_set_adc_alc_cfg(es8388_alc_cfg_st* cfg){int res = 0;if(cfg == (es8388_alc_cfg_st*)0){return -3;}uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_18, ®val)){regval &= 0x3F;regval |= cfg->alcsel<<6;if(0 != es8388_write_reg(ES8388_REG_18, regval)){return -2;}}else{return -1;}if(cfg->alcsel == ES8388_ALCSEL_OFF){return 0;}int alclvl;/* 0000对应输入-331010对应输入-3输入步进3*/if(cfg->alclvl < -33){alclvl = -33;}else if(cfg->alclvl > -3){alclvl = -3;}else{alclvl = cfg->alclvl;}//alclvl = (alclvl-(-33))/3;alclvl = (alclvl*2+3)/6+11;res |= es8388_write_reg(ES8388_REG_19, (uint8_t)((uint8_t)alclvl<<4)|(uint8_t)(cfg->alchld));res |= es8388_write_reg(ES8388_REG_20, ((uint8_t)(cfg->alcdcy)<<4)|(uint8_t)(cfg->alcatk));res |= es8388_write_reg(ES8388_REG_21, ((uint8_t)(cfg->alcmode)<<7)|((uint8_t)(cfg->alczc)<<6)|\((uint8_t)(cfg->time_out)<<5)|((uint8_t)(cfg->win_size/16)<<0));return res;}/******************************************************************************** DAC部分******************************************************************************/int es8388_set_dac_fs(es8388_fs_mode_e mode, es8388_fs_radio_e radio){uint8_t regval = 0;regval |= mode<<5;regval |= radio<<0;if(0 == es8388_write_reg(ES8388_REG_24, regval)){return 0;}else{return -2;}}int es8388_set_dac_mixsel(int ch, es8388_mixsel_e sel){uint8_t regval;if(0 == es8388_read_reg(ES8388_REG_38, ®val)){if(ch == ES8388_CH_L){regval &= ~LMIXSEL_MSK;regval |= sel<}else{regval &= ~RMIXSEL_MSK;regval |= sel<}if(0 == es8388_write_reg(ES8388_REG_38, regval)){return 0;}else{return -2;}}else{return -1;}}int es8388_set_dac_se(int level){uint8_t regval;if(0 != es8388_read_reg(ES8388_REG_29,®val)){return -1;}regval &= 0xE3;regval |= (level&0x07)<<2;if(0 != es8388_write_reg(ES8388_REG_29,regval)){return -2;}return 0;}int es8388_set_dac_eq(int shelving_a, int shelving_b){int res = 0;res |= es8388_write_reg(ES8388_REG_30,(shelving_a>>24)&0xFF);res |= es8388_write_reg(ES8388_REG_31,(shelving_a>>16)&0xFF);res |= es8388_write_reg(ES8388_REG_32,(shelving_a>>8)&0xFF);res |= es8388_write_reg(ES8388_REG_33,(shelving_a>>0)&0xFF);res |= es8388_write_reg(ES8388_REG_34,(shelving_b>>24)&0xFF);res |= es8388_write_reg(ES8388_REG_35,(shelving_b>>16)&0xFF);res |= es8388_write_reg(ES8388_REG_36,(shelving_b>>8)&0xFF);res |= es8388_write_reg(ES8388_REG_37,(shelving_b>>0)&0xFF);return (res == 0)?0:-1;}int es8388_set_dac_vol(es8388_ch_e ch, int vol){if(vol > 0){vol = 0;}else if(vol < -192){vol = -192;}vol = -vol;if(ch == ES8388_CH_L){if(0 != es8388_write_reg(ES8388_REG_26,vol)){return -1;}}else{if(0 != es8388_write_reg(ES8388_REG_27,vol)){return -1;}}return 0;}int es8388_set_dac_inv(es8388_ch_e ch, int inv){uint8_t regval;if(0 != es8388_read_reg(ES8388_REG_28,®val)){return -1;}if(ch == ES8388_CH_L){if(inv != 0){regval |= 0x20;}else{regval &= ~0x20;}}else{if(inv != 0){regval |= 0x10;}else{regval &= ~0x10;}}if(0 != es8388_write_reg(ES8388_REG_28,regval)){return -2;}return 0;}int es8388_set_dac_outvol(es8388_out_e out, int vol){/** 寄存器值0 对应输入值 -90* 寄存器值33 对应输入值 9*/if(vol < -90){vol = -90;}if(vol > 9){vol = 9;}//vol = (vol+90)/3;vol = (vol*2+3)/6 + 30;if(0 != es8388_write_reg(out-ES8388_OUT_L1+ES8388_REG_46,(uint8_t)vol)){return -1;}return 0;}int es8388_set_dac_mixgain(es8388_ch_e ch, int gain){uint8_t reg;uint8_t regval;if(ch == ES8388_CH_L){reg = ES8388_REG_39;}else{reg = ES8388_REG_42;}if(0 != es8388_read_reg(reg,®val)){return -1;}/** 寄存器值0 对应6db* 寄存器值7 对应-15db*/if(gain > 6){gain = 6;}if(gain < -15){gain = -15;}//gain = (6 - gain)/3;gain = 2-(gain*2+3)/6;regval &= 0xC7;regval |= ((uint8_t)gain<<3);if(0 != es8388_write_reg(reg,regval)){return -1;}return 0;}int es8388_set_dac_mixen(es8388_ch_e ch, es8388_out_src_e src, int en){uint8_t reg;uint8_t regval;uint8_t bitmsk;if(ch == ES8388_CH_L){reg = ES8388_REG_39;}else{reg = ES8388_REG_42;}if(0 != es8388_read_reg(reg,®val)){return -1;}if(src == ES8388_OUT_SRC_MIXSEL){bitmsk = 0x40;}else{bitmsk = 0x80;}if(en == 0){regval &= ~bitmsk;}else{regval |= bitmsk;}if(0 != es8388_write_reg(reg,regval)){return -2;}return 0;}int es8388_dump_allregs(void){uint8_t regval;for(int i=0; i<53; i++){if(0 != es8388_read_reg(i,®val)){return -1;}ES8388_LOG(("REG%02d:0x%x\r\n",i,regval));}return 0;}
es8388.h
extern "C"{/* 控制相关寄存器 *//* ADC相关寄存器 *//* DAC相关寄存器 *//*** \enum es8388_ch_e* 通道枚举*/typedef enum{ES8388_CH_L = 0, /**< 左通道 */ES8388_CH_R = 1, /**< 右通道 */}es8388_ch_e;/*** \enum es8388_chip_pwr_e* chip power寄存器bit枚举*/typedef enum{ES8388_ADC_DIGPDN = 0x80, /**< resets ADC DEM, filter and serial data port */ES8388_DAC_DIGPDN = 0x40, /**< resets DAC DSM, DEM, filter and serial data port */ES8388_ADC_STM_RST = 0x20, /**< reset ADC state machine to power down state */ES8388_DAC_STM_RST = 0x10, /**< reset DAC state machine to power down state */ES8388_ADCDLL_PDN = 0x08, /**< ADC_DLL power down, stop ADC clock */ES8388_DACDLL_PDN = 0x04, /**< DAC_DLL power down, stop DAC clock */ES8388_ADCVREF_PDN = 0x02, /**< ADC analog reference power down */ES8388_DACVREF_PDN = 0x01, /**< DAC analog reference power down */}es8388_chip_pwr_e;/*** \enum es8388_chip_ctl2_e* chip ctl2寄存器bit枚举*/typedef enum{ES8388_LPVCMMOD = 0x20, /**< 1:low power */ES8388_LPVREFBUF = 0x10, /**< 1:low power */ES8388_PDNANA = 0x08, /**< 1 – entire analog power down */ES8388_PDNIBIASGEN = 0x04, /**< 1 – ibiasgen power down */ES8388_VREFLO = 0x02, /**< 1 – low power */ES8388_PDNVREFBUF = 0x01, /**< 1 – power down */}es8388_chip_ctl2_e;/*** \enum es8388_adc_pwr_e* adc power寄存器bit枚举*/typedef enum{ES8388_PDNAINL = 0x80, /**< 1 – left analog input power down */ES8388_PDNAINR = 0x40, /**< 1 – right analog input power down */ES8388_PDNADCL = 0x20, /**< 1 – left ADC power down */ES8388_PDNADCR = 0x10, /**< 1 – right ADC power down */ES8388_PDNMICB = 0x08, /**< 1 – microphone bias power down */ES8388_PDNADCBIASGEN = 0x04, /**< 1 – power down */ES8388_FLASHLP = 0x02, /**< 1 – flash ADC low power */ES8388_INT1LP = 0x01, /**< 1 – int1 low power */}es8388_adc_pwr_e;/*** \enum es8388_out_e* 输出枚举*/typedef enum{ES8388_OUT_L1 = 0, /**< L1输出 */ES8388_OUT_R1 = 1, /**< L2输出 */ES8388_OUT_L2 = 2, /**< R1输出 */ES8388_OUT_R2 = 3, /**< R2输出 */}es8388_out_e;/*** \enum es8388_out_src_e* 输出来源枚举*/typedef enum{ES8388_OUT_SRC_MIXSEL = 0, /**< 来源于MIXSEL */ES8388_OUT_SRC_DAC = 1, /**< 来源于DAC */}es8388_out_src_e;/*** \enum es8388_mixsel_e* MIXSEL输入枚举*/typedef enum{ES8388_MIXSEL_IN1 = 0,ES8388_MIXSEL_IN2 = 1,ES8388_MIXSEL_ADC_P = 3,ES8388_MIXSEL_ADC_N = 4,}es8388_mixsel_e;/*** \enum es8388_monomixsel_e* MONOMIXSEL输入枚举*/typedef enum{ES8388_MONOMIXSEL_STEREO = 0,ES8388_MONOMIXSEL_LADC = 1,ES8388_MONOMIXSEL_RADC = 2,}es8388_monomixsel_e;/*** \enum es8388_dssel_e* DSSEL选择枚举*/typedef enum{ES8388_DSSEL_LIN1_RIN1 = 0,ES8388_DSSEL_LIN2_RIN2 = 1,}es8388_dssel_e;/*** \enum es8388_slrck_e* lrck模式选择枚举*/typedef enum{ES8388_SLRCK_SEPARATE = 0, /**< DACLRC和ADCLRC分开 */ES8388_SLRCK_SAME = 1, /**< DACLRC和ADCLRC一样 */}es8388_slrck_e;/*** \enum es8388_lrcksel_e* lrck选择枚举，对应ES8388_SLRCK_SAME模式时，* MASTER时选择适用ADC还是DAC的LRCK为准*/typedef enum{ES8388_LRCKSEL_DAC_LRCK = 0, /**< 选择使用DAC LRCK */ES8388_LRCKSEL_ADC_LRCK = 1, /**< 选择使用ADC LRCK */}es8388_lrcksel_e;/*** \enum es8388_mode_e* 模式枚举*/typedef enum{ES8388_MODE_SLAVE = 0, /**< es8388作为从 */ES8388_MODE_MASTER = 1, /**< es8388作为主 */}es8388_mode_e;/*** \enum es8388_insel_e* 输入选择枚举*/typedef enum{ES8388_INSEL_IN1 = 0,ES8388_INSEL_IN2 = 1,ES8388_INSEL_LR = 3,}es8388_insel_e;/*** \enum es8388_format_datsel_e* 通道数据选择*/typedef enum{DATSEL_LDATA_LADC_RDATA_RADC = 0, /**< 左通道数据来源于左ADC,右通道数据来源于右ADC */DATSEL_LDATA_LADC_RDATA_LADC = 1, /**< 左右通道数据均来源于左ADC */DATSEL_LDATA_RADC_RDATA_RADC = 2, /**< 左右通道数据均来源于右ADC */DATSEL_LDATA_RADC_RDATA_LADC = 3, /**< 左通道数据来源于右ADC,右通道数据来源于左ADC */}es8388_format_datsel_e;/*** \enum es8388_format_lrp_e* 极性模式枚举*/typedef enum{LRP_NORMAL_2ND = 0, /**< 对于I2S模式表示左对齐,对于DSP/PCM格式表示第二个BCLK开始传数据 */LRP_INVERTED_1ND = 1, /**< 对于I2S模式表示右对齐,对于DSP/PCM格式表示第一个BCLK开始传数据 */}es8388_format_lrp_e;/*** \enum es8388_format_wl_e* 字长枚举*/typedef enum{WL_24 = 0, /**< 24位 */WL_20 = 1, /**< 20位 */WL_18 = 2, /**< 18位 */WL_16 = 3, /**< 16位 */WL_32 = 4, /**< 32位 */}es8388_format_wl_e;/*** \enum es8388_format_e* 格式枚举*/typedef enum{FORMAT_I2S = 0, /**< I2S模式 */FORMAT_LEFT = 1, /**< LEFT模式 */FORMAT_RIGHT = 1, /**< RIGHT模式 */FORMAT_DSPPCM = 3, /**< DPS/PCM模式 */}es8388_format_e;/*** \enum es8388_fs_mode_e* 采样模式枚举*/typedef enum{ES8388_FS_MODE_SINGLE = 0, /**< single speed 模式 */ES8388_FS_MODE_DOUBLE = 1, /**< double speed 模式 */}es8388_fs_mode_e;/*** \enum es8388_fs_radio_e* ADC主模式时MCLK和采样率比例枚举*/typedef enum{ES8388_FS_RADIO_128 = 0,ES8388_FS_RADIO_192 = 1,ES8388_FS_RADIO_256 = 2,ES8388_FS_RADIO_384 = 3,ES8388_FS_RADIO_512 = 4,ES8388_FS_RADIO_576 = 5,ES8388_FS_RADIO_768 = 6,ES8388_FS_RADIO_1024 = 7,ES8388_FS_RADIO_1152 = 8,ES8388_FS_RADIO_1408 = 9,ES8388_FS_RADIO_1536 = 10,ES8388_FS_RADIO_2112 = 11,ES8388_FS_RADIO_2304 = 12,ES8388_FS_RADIO_125 = 16,ES8388_FS_RADIO_136 = 17,ES8388_FS_RADIO_250 = 18,ES8388_FS_RADIO_272 = 19,ES8388_FS_RADIO_375 = 20,ES8388_FS_RADIO_500 = 21,ES8388_FS_RADIO_544 = 22,ES8388_FS_RADIO_750 = 23,ES8388_FS_RADIO_1000 = 24,ES8388_FS_RADIO_1088 = 25,ES8388_FS_RADIO_1496 = 26,ES8388_FS_RADIO_1500 = 27,}es8388_fs_radio_e;/*** \enum es8388_noise_gate_type_e* 噪声门控类型*/typedef enum{ES8388_NOISE_GATE_TYPE_PGA_CONST = 0, /**< 噪声超过门限,则PGA保持固定值 */ES8388_NOISE_GATE_TYPE_MUTE= 1, /**< 噪声超过门限,则静音 */} es8388_noise_gate_type_e;/*** \enum es8388_alcsel_e* ALC自动增益控制类型*/typedef enum{ES8388_ALCSEL_OFF = 0,ES8388_ALCSEL_R = 1,ES8388_ALCSEL_L = 2,ES8388_ALCSEL_LR = 3,} es8388_alcsel_e;/*** \enum es8388_alcmode_e* ALC模式枚举*/typedef enum{ES8388_ALCMODE_NORMAL = 0,ES8388_ALCMODE_LIMITER = 1,} es8388_alcmode_e;/*** \enum es8388_vmidsel_e* VMIDSEL枚举*/typedef enum{ES8388_VMIDSEL_DISABLE = 0,ES8388_VMIDSEL_50K = 1,ES8388_VMIDSEL_500K = 2,ES8388_VMIDSEL_5K = 3,} es8388_vmidsel_e;/*** \enum es8388_alc_cfg_e* ALC自动增益配置结构体*/typedef struct{es8388_alcsel_e alcsel;int alclvl; /**< 目标值: 输入范围-33~-3,放大了两倍,实际对应-16.5~-1.5db */int alchld; /**< 增益在上升前的保持时间:输入范围0~15,对应范围0~1367040uS, 2.67mS的指数倍数 */int alcdcy; /**< 增益斜坡上升时间 输入范围0~15，具体值参考手册REG20描述 */int alcatk; /**< 增益斜坡下降时间 输入范围0~15，具体值参考手册REG20描述 */es8388_alcmode_e alcmode; /**< \ref es8388_alcmode_e */int alczc; /**< 1:ALC使用果岭检测电路, 0:不使用 */int time_out; /**< 1:过零超时检测电路使能,0不使能 */int win_size; /**< 峰值检测的窗口大小,单位为采样点, 输入范围96~496个采样点,步进16个采样点 */} es8388_alc_cfg_st;/******************************************************************************** 全局控制部分******************************************************************************//*** \fn es8388_dump_allregs* 打印所有寄存器值,需要配置宏ES8388_LOG_EN为1* \retval 0 成功* \retval -1 失败*/int es8388_dump_allregs(void);/*** \fn es8388_set_mode_bck* 设置模式和BCK* \param[in] mode 模式 \ref es8388_mode_e* \param[in] mclkdiv2 0:mclk不分频 1:mclk二分频* \param[in] blck_inv 1:bclk信号电平翻转 0:不翻转* \param[in] bclk_div BCLK来自于MCLK的分频值,es8388为从模式无需设置,为主模式需要设置,具体值见手册.* \retval 0 成功* \retval -1 写寄存器失败*/int es8388_set_mode_bck(es8388_mode_e mode, int mclkdiv2, int bclk_inv, int bclk_div);/*** \fn es8388_set_chip_pwr_bits* 设置Register 2 – Chip Power Management的对应位* \param[in] bits \ref es8388_chip_pwr_e 多个bit的或.* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_chip_pwr_bits(int bits);/*** \fn es8388_clr_chip_pwr_bits* 清除Register 2 – Chip Power Management的对应位* \param[in] bits \ref es8388_chip_pwr_e 多个bit的或.* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_clr_chip_pwr_bits(int bits);/*** \fn es8388_set_lrck* 设置LRCK* \param[in] slrck 设置ADC和DAC的LRCK是一样还是分开 \ref es8388_slrck_e* \param[in] lrcksel 主模式时,且slrck为ES8388_SLRCK_SAME时设置使用ADC还是DAC的LRCK.* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_lrck(es8388_slrck_e slrck, es8388_lrcksel_e lrcksel);/*** \fn es8388_set_vmidsel* VMID控制* \param[in] vmidsel \ref es8388_vmidsel_e* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_vmidsel(es8388_vmidsel_e vmidsel);/*** \fn es8388_set_enref* reference参考使能设置* \param[in] en 1:使能 0:不使能* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_enref(int en);/*** \fn es8388_set_chip_ctrl2_bits* 设置Register 1 – Chip Control 2的对应位* \param[in] bits \ref es8388_chip_ctl2_e 多个bit的或.* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_chip_ctrl2_bits(int bits);/*** \fn es8388_clr_chip_ctrl2_bits* 清除Register 1 – Chip Control 2的对应位* \param[in] bits \ref es8388_chip_ctl2_e 多个bit的或.* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_clr_chip_ctrl2_bits(int bits);/*** \fn es8388_set_adc_pwr_bits* 设置Register 3 – ADC Power Management的对应位* \param[in] bits \ref es8388_adc_pwr_e 多个bit的或.* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_adc_pwr_bits(int bits);/*** \fn es8388_clr_adc_pwr_bits* 清除Register 3 – ADC Power Management的对应位* \param[in] bits \ref es8388_adc_pwr_e 多个bit的或.* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_clr_adc_pwr_bits(int bits);/*** \fn es8388_set_dac_pwr* 设置DAC电源* \param[in] ch \ref es8388_ch_e* \param[in] en 1上电 0掉电* \retval 0 成功* \retval -1 写寄存器失败*/int es8388_set_dac_pwr(es8388_ch_e ch, int en);/*** \fn es8388_set_dac_out_en* 设置输出使能* \param[in] out 输出引脚 \ref es8388_out_e* \param[in] en 1使能 0不使能* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败* \retval -3 参数错误*/int es8388_set_dac_out_en(es8388_out_e ch, int en);/******************************************************************************** ADC部分******************************************************************************//*** \fn es8388_set_adc_gain* 设置ADC增益* \param[in] ch 通道 \ref es8388_ch_e* \param[in] gain 增益 0~24db,步进3db* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_adc_gain(es8388_ch_e ch, uint8_t gain);/*** \fn es8388_set_adc_ds* 设置ADC差分* \param[in] lsel \ref es8388_dssel_e* \param[in] rsel \ref es8388_dssel_e* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_adc_ds(es8388_dssel_e lsel, es8388_dssel_e rsel);/*** \fn es8388_set_adc_in* 设置ADC输入选择* \param[in] ch 通道 \ref es8388_ch_e* \param[in] sel 输入选择 \ref es8388_insel_e* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_adc_in(es8388_ch_e ch, es8388_insel_e sel);/*** \fn es8388_set_adc_monomixss* 设置MONOMIX* \param[in] sel 选择的输入 \ref es8388_monomixsel_e* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_adc_monomix(es8388_monomixsel_e sel);/*** \fn es8388_set_adc_format* 设置ADC数据格式* \param[in] datsel 数据选择 \ref es8388_format_datsel_e* \param[in] lrp 极性配置 \ref es8388_format_lrp_e* \param[in] wl 字长配置 \ref es8388_format_wl_e* \param[in] format 格式配置 \ref es8388_format_e* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_adc_format(es8388_format_datsel_e datsel, es8388_format_lrp_e lrp,es8388_format_wl_e adcwl, es8388_format_e format);/*** \fn es8388_set_adc_fs* 设置ADC采样率和模式* \param[in] mode 采样模式 \ref es8388_fs_mode_e* \param[in] radio 采样率设置 \ref es8388_fs_radio_e 只有主模式才有效* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_adc_fs(es8388_fs_mode_e mode, es8388_fs_radio_e radio);/*** \fn es8388_set_adc_vol_attenuates* 设置ADC音量衰减* \param[in] ch 通道 \ref es8388_ch_e* \param[in] db 衰减值, 单位为0.5db 比如写1则衰减0.5db, 最大0xC0=192* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_adc_vol_attenuates(es8388_ch_e ch, uint8_t db);/*** \fn es8388_set_adc_pgagain_th* 设置PGA增益范围* \param[in] max 输入值为实际值放大2倍, 即输入-13~71 对应-6.5~35.5db,步进6db,即输入值步进12* \param[in] min 输入值为实际值放大2倍, 即输入-24~60 对应-12~30db,步进6db,即输入值步进12* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_adc_pgagain_th(int max, int min);/*** \fn es8388_set_adc_noisegate* 设置ADC噪声门控* \param[in] en 1使能 0不使能* \param[in] type 门控类型 \ref es8388_noise_gate_type_e* \param[in] th 门控阈值 输入范围60~153, 实际放大了2倍,对应30~76.5db, 步进距离是1.5db即，即输入数值3.* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_adc_noisegate(int en, es8388_noise_gate_type_e type, int th);/*** \fn es8388_set_adc_alc_cfg* 设置ALC配置* \param[in] cfg \ref es8388_alc_cfg_st* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败* \retval -3 参数错误*/int es8388_set_adc_alc_cfg(es8388_alc_cfg_st* cfg);/******************************************************************************** DAC部分******************************************************************************//*** \fn es8388_set_dac_fs* 设置DAC采样率和模式* \param[in] mode 采样模式 \ref es8388_fs_mode_e* \param[in] radio 采样率设置 \ref es8388_fs_radio_e 只有主模式才有效* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_dac_fs(es8388_fs_mode_e mode, es8388_fs_radio_e radio);/*** \fn es8388_set_dac_format* 设置DAC数据格式* \param[in] lrswap 1交换左右通道数据 0不交换* \param[in] lrp 极性配置 \ref es8388_format_lrp_e* \param[in] wl 字长配置 \ref es8388_format_wl_e* \param[in] format 格式配置 \ref es8388_format_e* \retval 0 成功* \retval -1 写寄存器失败*/int es8388_set_dac_format(int lrswap, es8388_format_lrp_e lrp,es8388_format_wl_e adcwl, es8388_format_e format);/*** \fn es8388_set_dac_mixsel* 设置MIXSEL* \param[in] ch 通道 0:L 1:R* \param[in] sel 选择的输入 \ref es8388_mixsel_e* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_dac_mixsel(int ch, es8388_mixsel_e sel);/*** \fn es8388_set_dac_se* 设置立体声增强 Stereo Enhancement* \param[in] level 0~7 7增强效果最强* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_dac_se(int level);/*** \fn es8388_set_dac_eq* 设置均衡参数* \param[in] shelving_a shelving方式均衡30位a参数* \param[in] shelving_a shelving方式均衡30位b参数* \retval 0 成功* \retval -1 写寄存器失败*/int es8388_set_dac_eq(int shelving_a, int shelving_b);/*** \fn es8388_set_dac_vol* 设置DAC输出音量* \param[in] ch \ref es8388_ch_e* \param[in] vol 输入范围0~-192,对应0~-96db,即输入值放大了2倍,设置-96db时即静音* \retval 0 成功* \retval -1 写寄存器失败*/int es8388_set_dac_vol(es8388_ch_e ch, int vol);/*** \fn es8388_set_dac_inv* 设置DAC输出翻转* \param[in] ch \ref es8388_ch_e* \param[in] inv 1翻转 0不翻转* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_dac_inv(es8388_ch_e ch, int inv);/*** \fn es8388_set_dac_outvol* 设置输出音量* \param[in] out 输出引脚 \ref es8388_out_e* \param[in] vol 输入范围-90~9,对应-45db~4.5db,即设置值放大了2倍* \retval 0 成功* \retval -1 写寄存器失败*/int es8388_set_dac_outvol(es8388_out_e out, int vol);/*** \fn es8388_set_dac_mixgain* 设置MIX增益* \param[in] ch \ref es8388_ch_e* \param[in] gain 增益-15~6* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_dac_mixgain(es8388_ch_e ch, int gain);/*** \fn es8388_set_dac_mixen* 设置MIX开关使能* \param[in] ch \ref es8388_ch_e* \param[in] src \ref es8388_out_src_e* \param[in] en 1使能 0不使能* \retval 0 成功* \retval -1 读寄存器失败* \retval -2 写寄存器失败*/int es8388_set_dac_mixen(es8388_ch_e ch, es8388_out_src_e src, int en);}
参考如下过程，同时录音和播放。
对应驱动代码如下
static int es8388_itf_cfg(void){/* 见ES8388 user Guide.pdf的10.1 The Sequence for Start up codec *//* 1.设置ES8388为从模式 */es8388_set_mode_bck(ES8388_MODE_SLAVE, 0, 0, 0);/* 2.关闭DEM STM等电源 */es8388_set_chip_pwr_bits(ES8388_ADC_DIGPDN | ES8388_DAC_DIGPDN | ES8388_ADC_STM_RST | \ES8388_DAC_STM_RST | ES8388_ADCVREF_PDN | ES8388_DACVREF_PDN);/* 3.设置ADC DAC使用同样的LRCK */es8388_set_lrck(ES8388_SLRCK_SAME,ES8388_LRCKSEL_DAC_LRCK);/* 4.Set Chip to Play&Record Mode */es8388_set_enref(1);es8388_set_vmidsel(ES8388_VMIDSEL_50K);/* 5.Power Up Analog and Ibias */es8388_clr_chip_ctrl2_bits(ES8388_PDNIBIASGEN | ES8388_PDNANA | ES8388_LPVREFBUF);/* 6.Power up ADC / Analog Input /Micbias for Record */es8388_clr_adc_pwr_bits(ES8388_PDNAINL | ES8388_PDNAINR | ES8388_PDNADCL |ES8388_PDNADCR | ES8388_PDNMICB | ES8388_PDNADCBIASGEN);/* 7.Power up DAC and Enable LOUT/ROUIT */es8388_set_dac_pwr(ES8388_CH_L,1);es8388_set_dac_pwr(ES8388_CH_R,1);es8388_set_dac_out_en(ES8388_OUT_L1,1);es8388_set_dac_out_en(ES8388_OUT_L2,1);es8388_set_dac_out_en(ES8388_OUT_R1,1);es8388_set_dac_out_en(ES8388_OUT_R2,1);/* ADC部分 */es8388_set_adc_gain(ES8388_CH_L, 24); /* PGA增益 24db */es8388_set_adc_gain(ES8388_CH_R, 24);es8388_set_adc_ds(ES8388_DSSEL_LIN1_RIN1, ES8388_DSSEL_LIN2_RIN2);es8388_set_adc_in(ES8388_CH_L,ES8388_INSEL_LR);es8388_set_adc_in(ES8388_CH_R,ES8388_INSEL_LR);es8388_set_adc_monomix(ES8388_MONOMIXSEL_STEREO);es8388_set_adc_format(DATSEL_LDATA_LADC_RDATA_RADC, LRP_NORMAL_2ND, WL_24, FORMAT_I2S);es8388_set_adc_fs(ES8388_FS_MODE_SINGLE, ES8388_FS_RADIO_1000);es8388_set_adc_vol_attenuates(ES8388_CH_L, 86); /* 先设置衰减大一点，避免ADC噪声过大或者超量程 */es8388_set_adc_vol_attenuates(ES8388_CH_R, 86);es8388_set_adc_pgagain_th(47, 0);es8388_alc_cfg_st alccfg={.alcsel = ES8388_ALCSEL_LR,.alclvl = -3,.alchld = 0,.alcdcy = 1,.alcatk = 2,.alcmode = ES8388_ALCMODE_NORMAL,.alczc = 0,.time_out = 0,.win_size = 96,};es8388_set_adc_alc_cfg(&alccfg);es8388_set_adc_noisegate(1, ES8388_NOISE_GATE_TYPE_MUTE, 81);/* DAC部分*/es8388_set_dac_format(0, LRP_NORMAL_2ND, WL_24, FORMAT_I2S); /* 设置DAC数据格式 */es8388_set_dac_fs(ES8388_FS_MODE_SINGLE, ES8388_FS_RADIO_1000);es8388_set_dac_vol(ES8388_CH_L, 0); /* 设置L通道音量 0db即不衰减,最大音量 */es8388_set_dac_vol(ES8388_CH_R, 0);es8388_set_dac_mixen(ES8388_CH_L,ES8388_OUT_SRC_MIXSEL,0); /* 设置OUT只来源于DAC,不来源于MIXSEL */es8388_set_dac_mixen(ES8388_CH_L,ES8388_OUT_SRC_DAC,1);es8388_set_dac_mixen(ES8388_CH_R,ES8388_OUT_SRC_MIXSEL,0);es8388_set_dac_mixen(ES8388_CH_R,ES8388_OUT_SRC_DAC,1);es8388_set_dac_outvol(ES8388_OUT_L1,9); /* 设置对应引脚的输出音量,使用L的1和2引脚, 先设置最小音量-90/2db避免输出过大 */es8388_set_dac_outvol(ES8388_OUT_L2,9);es8388_set_dac_outvol(ES8388_OUT_R1,9);es8388_set_dac_outvol(ES8388_OUT_R2,9);/* 开DEM STM等电源 */es8388_clr_chip_pwr_bits(ES8388_ADC_DIGPDN | ES8388_DAC_DIGPDN | ES8388_ADC_STM_RST | \ES8388_DAC_STM_RST | ES8388_ADCVREF_PDN | ES8388_DACVREF_PDN);return 0;}
以上配置之后,ES8388的ASDOUT就会输出数据，控制器可以通过DSIN发送数据给ES8388
如下是16k双通24位的抓取IIS上的数据。
完整文件下载
链接：https://pan.baidu.com/s/1ei4JamPRkFZP0NjqVKA5Aw?pwd=fs0t
提取码：fs0t
使用DsView软件打开。
