随着半导体产业向更先进的制造技术迁移,混合信号设计面临许多新的挑战,这迫使半导体公司提升混合信号设计的效率。而融合了约束管理新技术的新设计平台有望解决这些这些日益增多的难题......
Flexible Constraint-Management Drives Next-Generation Mixed-Signal Design
As the industry migrates to more advanced manufacturing technologies, the resulting complexity threatens to increase delays and dramatically boost the cost of differentiated custom silicon for analog-mixed-signal (AMS) applications. For semiconductor companies, achieving success in the face of these emerging technical and market challenges rests squarely on their ability to improve the efficiency of custom AMS IC development from design through verification and layout and into manufacturing. By combining new techniques such as constraint management with efficient user interface methods and interoperability capabilities, new design platforms promise to meet these growing challenges.
AMS Challenges
Advanced manufacturing technologies present AMS designers with greater challenges in managing parasitic behavior complexity, thermal and process variations, and noise interactions. In advanced designs using multiple power supply regions, IC designers require greater precision in transistor optimization and layout as they address growing concerns in high-speed I/O, noise control and significant IR drop due to parasitics. At the same time, increasing design and manufacturing requirements drive a growing array of design and manufacturing parameters that must be addressed early in design to avoid costly respins. The need for greater accuracy requires improved characterization of analog IP and libraries " each of which is becoming more sensitive to process variation and circuit interaction effects with each new product generation and advance in manufacturing technology.
For AMS semiconductor companies, the combined effect of growing technical issues and increasing business challenges impacts all phase of the AMS market. In mainstream AMS design, IC manufacturers expect designers working in 130nm technologies to maximize both design performance and manufacturing yield. For these designers, achieving the optimal balance requires greater accuracy in modeling and simulation to reduce guard bands without compromising yield. In addition, the ability to achieve an effective co-design of analog circuitry and packaging has become critical, particularly as speeds approach radio-frequency.
As design complexity mounts, so do the technical requirements and associated challenges (Figure 1). At 90nm, signal integrity and timing closure issues require engineers to adopt more effective means to identify and fix these problems, while still addressing yield concerns prior to manufacturing.
Furthermore, designers creating advanced system-in-package (SiP) and next-generation 65nm system-on-chip (SoC) designs need to combine complex digital blocks with RF components for wireless consumer devices. As clock frequencies increase and IC feature sizes shrink, these engineers must address the increasing analog behavior from digital blocks while coping with a combination of analog, digital and packaging requirements in these complex designs. For companies moving to 45nm technologies, these emerging challenges magnify in importance as designers work to characterize cell libraries quickly and accurately.
1. With each advance in manufacturing technology, IC designers face a significant increase in the type and number of constraints, including traditional design rules.
Design realities
With traditional approaches, AMS design teams have simply lacked the tools and methodologies needed to explore design alternatives early in design. Decisions made early in design have largely "locked in" the result, too often forcing wholesale redesigns and costly respins to untangle problems arising from early design decisions.
In the design phase, inefficient verification methods have complicated engineers' ability to optimize sensitive designs. In the face of shrinking product schedules, designers have been forced to limit verification runs, potentially compromising coverage for the sake of time-to-market. At the extremes of design complexity, SiP and SoC designers must work around traditional limitations in their ability to verify analog or RF circuits in the context of the full system.
With the increasing impact of physical effects on design performance, these problems extend and expand in layout phase, too often leading to further delays as engineers rework layouts or even completely redo physical designs to accommodate a growing list of design and manufacturing constraints. Here, the gap between modeling accuracy and silicon performance becomes sharply evident, leading to ICs that fail to achieve expected levels of performance, manufacturing yield or both.
Yet, more effective design methodologies, tools and models remain only supporting elements in AMS design. The custom nature of AMS design inherently requires continual manual guidance and careful tuning, depending on the knowledge, experience and talent of engineers to transform design specifications into high-yield, high-performance silicon. Indeed, AMS design can never be fully automated, but an effective design platform can significantly assist the process of custom design. By providing capabilities able to enhance the productivity of design teams, more effective methodologies, tools and models can help AMS manufacturers achieve their silicon objectives in a minimal amount of time with the minimum number of engineering resources.
Emerging AMS design solutions address the realities of custom AMS design with new technologies such as constraint management. Providing a unified environment for AMS design, newer platforms enable design teams to tackle the full range of design challenges, from mainstream analog ICs to advanced mixed-signal/RF designs needed to address emerging requirements from fast-moving markets such as telecom and consumer segments.
The emergence of fast, highly accurate verification engines brings support to a broad range of custom design styles including RF, mixed-signal, memory, and more. By working with a consistent set of engines, designers can move efficiently between design and verification using the same design infrastructure components such as model libraries. At the same time, newer floorplanning technologies now allow designers to rapidly explore architectural alternatives. Here, engineers can place large blocks and perform top-level routing, assisted by platform capabilities for automatically controlling width and spacing for nets and classes of nets and utilizing options such as shielding of signals and buses. For detailed routing, routers based on advanced space-based routing technologies assist layout engineers with rules-guided, autorouting capabilities. Driven by design and manufacturing constraints, these new tools are able to account for resolution enhancement technology (RET), optical proximity correction (OPC), and chemical-mechanical polishing (CMP) technologies to ensure process rule adherence and manufacturability.
Assisted automation enables engineers to focus on the specifics of circuit behavior, relying on the platform to automate tedious, non-differentiating tasks such as reports and manual constraint management. In the past, designers would need to manually define constraints to reflect their design intent in creating specific structures such as matched circuits for differential amplifiers, typically noting such critical constraints as free-text notes within the schematic itself. In turn, the layout engineer would need to look carefully through the schematic for notes describing such constraints. AMS designers already find themselves forced into design iterations arising from the limitations inherent in this manual approach. As design complexity grows, this traditional approach for implementing constraints will simply be unable to keep up with the flood of constraints emerging from each stage of design and manufacturing, risking further delays and even respins.
Constraint-driven design
At the heart of this assisted automation concept, automated constraint management promises to help design teams maintain design intent throughout the entire design flow, automating the communication and application of complex design constraints from specifications through layout to verification (Figure 2). By incorporating constraints as metadata within a schematic, for example, designers ensure that their design intent remains a factor in decisions made during downstream phases such as layout.
2. With automated constraint management, a designer can attach constraints to a schematic indicating that certain transistors need to be matched and symmetric (left). During physical design, layout engineers can easily find these constraints as they manually build the layout or even allow constraint-aware layout tools to automatically comply with the constraint to create a suitable layout (right).
Manufacturing engineers can similarly incorporate manufacturing constraints in a design, ensuring that even the earliest design decisions account more effectively for the growing impact of manufacturing on design performance and functionality. As such, engineers at each stage of development can focus their efforts more strictly on enhancing IC performance and yield.
Emerging technologies for constraint management eliminate the traditional labor-intensive, error-prone task of constraint definition, propagation, and communication by automating constraint management across design, layout and verification. At each stage of design, a design team member can identify constraints by class or specific parameter, allowing those constraints to guide his or her own engineering task " or overriding the constraint to meet some higher objective. In turn, the same team member can add further constraints for propagation to the next stage of development.
Within a constraint-aware design environment, constraints can drive specific engineering steps such as preliminary placement and routing or simply inform the final decisions made by engineering specialists such as layout engineers. Constraint-driven design, verification and layout help eliminate manual rework while allowing geographically dispersed design teams to rapidly collaborate on delivering verified design intent in optimized silicon. As a result, automated constraint management facilitates rapid parasitic closure and addresses the broad range of electrical and physical design concerns simultaneously to meet both performance and yield requirements. The emergence of constraint-driven methodologies tightens the connection between the design and implementation, allowing for a smoother and less error-prone handoff between increasingly complex stages of IC development. For semiconductor companies, these capabilities translate into faster design time, reduced errors and increased predictability and opportunity for first-pass silicon success.
Automation foundations
Assisted automation for AMS design depends critically on emerging technologies such as consistent verification engines, advanced routing engines and automated constraint management capabilities. At a more fundamental level, however, this emerging approach to AMS design rests on the availability of open, effective standards for data representation and interchange.
Unlike traditional design environments, an effective platform for assisted AMS design automation relies on the availability of an open standards-based data infrastructure such as OpenAccess to integrate design tools and flows. Rather than forcing engineers to maintain a growing set of tool-to-tool data translation scripts and deal with various formats such as LEF, DEF, EDIF and the like, a uniform data model and access methods allow tools to combine complex metadata such as constraints with increasingly large design data sets. In turn, this type of standards-based approach lets semiconductor companies more easily combine assisted-automation technology within their own design flows. Besides reducing design support costs, this approach is essential for enabling effective multi-company design chains. Because each tool in each environment works with a common data model and uniform access methods, tools can share data more effectively.
3. Advanced AMS design platforms such as the Virtuoso custom design environment build on open standards to bring assisted automation capabilities needed to address the full range of AMS design challenges.
As semiconductor companies face increasing design challenges and decreasing market windows, AMS designers will continue to need more efficient design platforms able to address a growing list of concerns " from IP reuse and design efficiency to performance optimization and yield improvement. Traditional analog/mixed-signal design environments lack the breadth and depth of capability needed to respond to rising market expectations for applications that are increasingly portable, powerful and power-efficient. Newer platforms bring the concept of assisted automation to AMS design by combining new constraint-management methods with advanced technologies for design, verification and layout (Figure 3). As analog content continues to rise in market-leading ICs, this new approach to AMS design offers semiconductor companies and individual designers the combination of efficiency, productivity and innovative design capabilities needed to deliver differentiated, high-quality custom silicon on time.
About the Authors
Dr. Anthony J. Gadient has over twenty-five years of experience developing and marketing EDA software. He is currently leading the Product Marketing team for Cadence's Virtuoso custom design platform. Dr. Gadient received his PhD degree from Carnegie Mellon University, MBA from Wright-State University, and BSEE from the University of Virginia.
Steven Lewis is currently a product marketing director for the Virtuoso custom design platform at Cadence Design Systems. He holds a BSEE from Santa Clara University.
Anthony Gadient
Steven Lewis
Cadence Design