深度挖掘A5：待解的谜题

苹果公司的iPad 2发售至今仅仅过了一个月。但它内部的很多情况还是秘密，我们现在仅知道的是智能保护盖(Smart Cover)有21块磁铁，裸晶布局图也已经曝光。第一轮拆解的浪潮已经平息下来，一些详尽的电路分析报告或许很快就会浮出水面(参阅电子工程专辑报道：UBM的A5剖面图析：百分百三星制造，UBM官方拆解：挖掘iPad 2与A5内部的秘密)。

A4处理器去年也得到了相同的待遇，但没什么人认为这会是一个独立的设计，因为从苹果公司收购PA Semi打造设计团队到A4发售相隔的时间太短，不可能来得及完成新设计(参阅电子工程专辑报道：走进iPad，揭开苹果A4处理器的神秘面纱，苹果A4并非革命性产品，仅是一种定制设计？！，探寻A4处理器的奥秘)。A5则处理器不一样，中间又过了一年(电子工程专辑版权所有，谢绝转载)。

同样A5处理器也是苹果公司iOS片上系统设计战略中的第二个数据点。第二个设计为苹果公司预留的充分的时间来向自己想要的方向前进。那么A5处理器是怎样的？有没有达到预期？

首先来回顾一下

2010年1月27日的主题演讲中，iPad和A5处理器首次公开亮相。前者成为媒体的宠儿、全球消费市场追捧的对象，后者则被越来越多的苹果产品所采用。

2010年，A4处理器先后被iPhone 4、新一代iPod Touch和Apple TV所采用。这不是苹果公司在芯片设计方面的首次尝试，但很可能是他们最重要的一次。A4成为了苹果iOS设备的核心，为这家全球最大的科技厂商带来了非常大的营收流，这是之前的设计所没有做到的。

尽管客户是固定的，但A4和A5依然是值得关注的半导体新闻。说它们是市场的挑战者或许有些夸张，但其它半导体公司在非常认真地审视A系列片上系统，因为它们的产量和收益是如此之大(电子工程专辑版权所有，谢绝转载)。

A4处理器发布时，所有人的焦点都集中在它的设计有多大比重来自苹果公司收购的设计团队，特别是PA Semi，因为该团队被收购的时间最长。各种猜测持续了很长时间，iPad发售之后就开始拆解核实，确认电路设计究竟有没有被苹果公司收购的PA Semi和Intrinsity留下的痕迹。

当时的结论是Intrinsity参与了A4处理器的设计。同时我们也认为A4处理器在模块方面与三星的S5PC110非常相似。从这点上来看A4处理器并不完全是苹果公司自主设计，A4与S5PC110仅有两个模块不同，说明两者的IP关系紧密。

A5应该不一样，苹果公司有了更多时间，而三星在自己的Galaxy 10.1上采用了Tegra 2处理器。

下一页：A5的细节

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早期拆解透露了两条信息：1，A5的裸晶比A4大很多。UBM Techinsights和Chipworks的发现都表明A5的裸片面积为122 mm2(12.1 mm x 10.1 mm)。A4是53 mm2，也就是说A5的裸晶面积是A4的2.3倍。

我们仔细看一下Chipworks公布的A4、A5布局图，看看究竟是什么原因导致A5裸片面积增大。A5处理器的两颗ARM内核占据大约14%的裸片面积，比例与A4上的单ARM内核相当(电子工程专辑版权所有，谢绝转载)。

那么GPU呢？公布的A4处理器布局图并没有具体指出它的位置。但如果假定它尺寸适中、闪存容量中等，那它就是逻辑核4，是CPU和逻辑核5之外最大的。值得注意的是有多个模块尺寸与逻辑核5相当。在这次讨论中我们假设逻辑核4是GPU。裸晶减去CPU和GPU所占面积之后的尺寸为41 mm2，这部分将用于A4的其它数字模块、模拟和I/O。

现在来看A5

目前我们没有发现任何一张布局图——包括上面引用的这张——清晰注明GPU的所在，因此需要进行一些猜测。图中有三组两两相同的模块贴在一起。当中两个被标注为ARM核，四个被标注为“处理器数据通道(Processor Data Path)”。除此以外就没有其它两两相同的模块了。系统的四个核之间应该有仲裁(arbitration)，因此我认同标注的名称。但缺少其它两两相同的模块让我相信GPU也在这几个模块中。这六个模块代表着CPU+GPU+仲裁，共占据A5处理器40%的裸片面积(47 mm2)，剩下75%用于其它器件(电子工程专辑版权所有，谢绝转载)。

裸晶尺寸较大的苹果A5双核APU与第一代A4结构比较

单ARM内核应用处理器A4的裸晶红外线图象

尺寸较大的A5双核应用处理器裸晶尺寸和结构比较

未完待续

点击参考原文：A5: All Apple, part mystery

《电子工程专辑》网站版权所有，谢绝转载

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A5: All Apple, part mystery

Paul Boldt and Don Scansen

Apple Inc.'s iPad2 has only been publicly available for about a month. However, it appears this young device has kept few secrets since we have known there were 21 magnets in the smart cover and saw a die floorplan of the A5 within mere days of its release. The flurry of the first wave of disassembly and dissection seems to have died down while we might assume that some very detailed circuit analysis is likely just beginning to be scoped out.

When the A4 was subjected to the same procedure just under one year ago, there was a sense it was going to underwhelm anyone expecting a unique design because so little time had passed between Apple ramping up its design team with the acquisition of PA Semi and the release date. There simply wasn't time to generate a new design. The A5 is a different story. Another year has passed.

The A5 is also the second data point in terms of design strategy for Apple's iOS SoC. While two data points constitute a streak only in baseball, this second design would have had sufficient time for Apple to be moving in the direction they want. So how did the A5 fare? Has it met expectations at this early stage of the analysis?

First, a look back

During the Jan. 27, 2010, keynote both the iPad and A4 were publicly debuted for the first time. While the former has become a media darling and the object of global consumer desire, the latter quietly went about its business filling more and more sockets.

During 2010 the A4 appeared in the iPhone 4, iPod Touch and Apple TV. Although the A4 played second fiddle to the iPad, it did just fine in its own right. Yes it is not Apple's first design effort, but it is arguably their most important with the A4 being central to Apple's iOS devices and therefore key to a very large revenue stream for the largest technology company, something that cannot be said of previous design efforts.

While the client is somewhat captive in this case it is worth considering the A4 and now A5 as a semiconductor story. We might be jumping the gun to call them rivals, but other semiconductor companies are certainly taking the A-series of SoCs seriously because of the sheer number of sockets and high revenues those products generate.

At the time the A4 was announced, the burning question was how much of the design could be attributed to acquired design teams, especially PA Semi since they had been inside Apple longest. With an over-abundance of rumors by the time the A4 was available to the public, it was important to collate the physical evidence. Thus, our last look at the A4 consolidated some existing reverse engineering information, seasoned it with our own, and contemplated whether there was evidence of circuit design originating from Apple's PA Semi and Intrinsity acquisitions.

One conclusion was that there was evidence of Intrinsity design. We also concluded that the A4, on the block level, was very similar to Samsung's S5PC110. At that point the A4 did not appear all that unique. The simple finding that there were only two circuit blocks different between the A4 and S5PC110 spoke strongly to existing IP relationships.

The A5 should be different. Apple has had more time and Samsung has migrated to the Tegra 2 for their Galaxy 10.1.

There were two pieces of information to come out of the early reverse engineering from the big RE houses. First, the A5 die is dramatically larger than the A4. Both UBM Techinsights and Chipworks found the A5 die to be 12.1 mm x 10.1 mm, giving a die size of 122 mm2. This compares to 53 mm2 for the A4. The die size of the A5 is therefore 2.3 x larger than the A4.

Let's look closer at the A4 and A5 floorplans and consider what might be behind such a dramatic increase in die size for the A5. For this comparison we look to the floorplans published by Chipworks. The two ARM cores of the A5 combine to consume approximately 14 percent of the total die area. This is the roughly the same percentage as the single ARM core in the A4.

What about the GPU? The published floorplan of the A4 does not specifically identify it. However, if you assume it is a moderate size block with a fair amount of cache there is logic core 4, which is the largest outside the CPU and logic core 5. It is also noted that there are numerous blocks of approximately the same size as logic core 5. For the sake of the discussion let's assume core 4 is the GPU. In terms of absolute areas, If the CPU and GPU areas are added and the total subtracted from the overall die size there are 41 mm2 left for other digital blocks, analog and I/O for the A4.

Now to the A5

We are not aware of any published floorplan, including the one cited above, that explicitly identifies the GPUs, so some assumptions will be made. There are three sets of two identical blocks clustered together. Two of these are labeled as the ARM cores and four are labeled as "Processor Data Path." There are no two other blocks that appear the same. For a dual core system one would anticipate some sort of arbitration has to occur between them, agreeing with the labeling. However in the absence of two other blocks that are the same, it is believed that the two GPUs are within these blocks, or area. In the end, again for the sake of argument, these six blocks representing CPU+GPU+arbitration consume approximately 40 percent or 47 mm2 on the A5 die, leaving 75 mm2 for other stuff.

Die size and architecture comparison between larger dual core Apple A5 APU and the first generation A4

Infrared backside die image of Apple's A4 applications processor with single ARM core indicated.

Die size and architecture comparison of larger dual core Apple A5 applications processor.